Home » Uncategorized » 11 January 2008 » » No Comment »

Toshiba develops basic technology for world’s smallest flash memory element in 10nm generation

11 January 2008 No Comment
Applied double tunneling layer to realize 100 gigabit density

TOKYO–Toshiba Corporation today announced that it has developed a new double tunneling layer technology applicable to future 10nm generation flash memories. This elemental technology opens the way for memory devices with densities of over 100 gigabits in the 10nm generation, which lies four generations ahead. The technology was today announced at the IEDM (International Electron Devices Meeting) held at Washington D.C., U.S.A. more




Leave your response!

Add your comment below, or trackback from your own site. You can also subscribe to these comments via RSS.

Be nice. Keep it clean. Stay on topic. No spam.

You can use these tags:
<a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <s> <strike> <strong>

This is a Gravatar-enabled weblog. To get your own globally-recognized-avatar, please register at Gravatar.