Toshiba develops basic technology for world’s smallest flash memory element in 10nm generation
11 January 2008 
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Applied double tunneling layer to realize 100 gigabit density
TOKYO–Toshiba Corporation today announced that it has developed a new double tunneling layer technology applicable to future 10nm generation flash memories. This elemental technology opens the way for memory devices with densities of over 100 gigabits in the 10nm generation, which lies four generations ahead. The technology was today announced at the IEDM (International Electron Devices Meeting) held at Washington D.C., U.S.A. more
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